John is a Fellow in the Product Engineering organization at AMD and currently manages a team of architects responsible for co-developing new DFT methods & test solutions. His current focus is defining manufacturable test solutions for the challenges of AMD’s heterogenous 2.5D & 3D products. In his previous role, John was responsible for defining the architecture & test strategy for ATE, Burn-in, and System-Level test hardware across the wide spectrum of AMD products. John has been at AMD for 28+ years responsible for driving many test innovations from concept to production deployment. Prior to joining AMD, John graduated from the University of Texas in Austin in Electrical Engineering.

Architecting Test Solutions for the Next Generation of Compute

As the world of compute continues to grow from consumer devices to supercomputers to edge compute, new generation of products are being created with ever growing complexity. Future product architectures are evolving to supply the increasing demand for compute power, automation, and data. It is essential to work closely across multiple disciplines from silicon design, DFT, and test hardware/software to ensure success in being able to test these new generation of products with minimal test costs and the highest level of quality & reliability. As compute products continue to push fab process geometries in addition to pushing more complex 2.5D & 3D construction processes, this has required more emphasis on increasing test coverage & capacity for probe test solutions. Probe test requirements will demand higher current capability, tighter pitches, & higher test frequencies while sustaining high production lifetimes & test integrity. This will bring a new level of innovation in probe technologies as new metallurgy and construction schemes are being developed along with enhanced test methods across the industry. This keynote presentation will provide a general compute overview & roadmap, methods of innovating new test solutions, and provide wafer probe test needs going forward.

Rebeca Jimenez joined Amkor in 2014 and is currently Corporate Vice President, Advanced SiP Business Unit. Prior to assuming her current role, Ms. Jimenez served in various sales and strategic program management roles. She has more than 25 years of experience in the global semiconductor industry. Prior to joining Amkor, she spent 15 years with IDT (previously ICS) in both test engineering and operations roles as well as management positions. In addition, Ms Jimenez worked in various engineering and engineering management roles at Motorola. She holds a BS in Electrical Engineering from Arizona State University, as well as an MS in Electrical Engineering from National Technological University.

Advanced Packaging and Test Enabling Our Digital Society

Semiconductors are the building blocks of our modern digital society and allow us to be connected anywhere and everywhere. We interact with semiconductors every day through almost everything we do, whether using our smartphones, personal electronics, connected homes or our cars, which have become digital cockpits, immersed with advanced safety features. All of these digital interactions require massive computing and connectivity power to process, store and transfer data.

Join me as we explore innovations in advanced packaging and test technology and how they enable further transformation in our digital society with a focus on the key catalysts of 5G, High Performance Computing, IoT and Automotive applications.